Thomas Burger: Catalogue data in Spring Semester 2015

Name Dr. Thomas Burger
Address
Institut für Integrierte Systeme
ETH Zürich, ETZ J 76.1
Gloriastrasse 35
8092 Zürich
SWITZERLAND
Telephone+41 44 632 55 28
E-mailburgert@ethz.ch
DepartmentInformation Technology and Electrical Engineering
RelationshipLecturer

NumberTitleECTSHoursLecturers
227-0146-00LAnalog-to-Digital Converters Information 6 credits2V + 2UQ. Huang, T. Burger
AbstractThis course provides a thorough treatment of integrated data conversion systems from system level specifications and trade-offs, over architecture choice down to circuit implementation.
ObjectiveData conversion systems are substantial sub-parts of many electronic systems, e.g. the audio conversion system of a home-cinema systems or the base-band front-end of a wireless modem. Data conversion systems usually determine the performance of the overall system in terms of dynamic range and linearity. The student will learn to understand the basic principles behind data conversion and be introduced to the different methods and circuit architectures to implement such a conversion. The conversion methods such as successive approximation or algorithmic conversion are explained with their principle of operation accompanied with the appropriate mathematical calculations, including the effects of non-idealties in some cases. After successful completion of the course the student should understand the concept of an ideal ADC, know all major converter architectures, their principle of operation and what governs their performance.
Content- Introduction: information representation and communication; abstraction, categorization and symbolic representation; basic conversion algorithms; data converter application; tradeoffs among key parameters; ADC taxonomy.
- Dual-slope & successive approximation register (SAR) converters: dual slope principle & converter; SAR ADC operating principle; SAR implementation with a capacitive array; range extension with segmented array.
- Algorithmic & pipelined A/D converters: algorithmic conversion principle; sample & hold stage; pipe-lined converter; multiplying DAC; flash sub-ADC and n-bit MDAC; redundancy for correction of non-idealties, error correction.
- Performance metrics and non-linearity: ideal ADC; offset, gain error, differential and integral non-linearities; capacitor mismatch; impact of capacitor mismatch on SAR ADC's performance.
- Flash, folding an interpolating analog-to-digital converters: flash ADC principle, thermometer to binary coding, sparkle correction; limitations of flash converters; the folding principle, residue extraction; folding amplifiers; cascaded folding; interpolation for folding converters; cascaded folding and interpolation.
- Noise in analog-to-digital converters: types of noise; noise calculation in electronic circuit, kT/C-noise, sampled noise; noise analysis in switched-capacitor circuits; aperture time uncertainty and sampling jitter.
- Delta-sigma A/D-converters: linearity and resolution; from delta-modulation to delta-sigma modulation; first-oder delta-sigma modulation, circuit level implementation; clock-jitter & SNR in delta-sigma modulators; second-order delta-sigma modulation, higher-order modulation, design procedure for a single-loop modulator.
- Digital-to-analog converters: introduction; current scaling D/A converter, current steering DAC, calibration for improved performance.
Lecture notesHandouts of the slides will be distributed.
Literature- B. Razavi, Principles of Data Conversion System Design, IEEE Press, 1994
- M. Gustavsson et. al., CMOS Data Converters for Communications, Springer, 2010
- R.J. van de Plassche, CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters, Springer, 2010
Prerequisites / NoticeIt is highly recommended to attend the course "Analog Integrated Circuits" of Prof. Huang as a preparation for this course.