Frank Kagan Gürkaynak: Catalogue data in Spring Semester 2021

Award: The Golden Owl
Name Dr. Frank Kagan Gürkaynak
Address
Institut für Integrierte Systeme
ETH Zürich, ETZ J 60.1
Gloriastrasse 35
8092 Zürich
SWITZERLAND
Telephone+41 44 632 27 26
E-mailkgf@ethz.ch
URLhttp://www.iis.ee.ethz.ch/~kgf
DepartmentInformation Technology and Electrical Engineering
RelationshipLecturer

NumberTitleECTSHoursLecturers
227-0147-00LVLSI II: Design of Very Large Scale Integration Circuits Information 6 credits5GF. K. Gürkaynak, L. Benini
AbstractThis second course in our VLSI series is concerned with how to turn digital circuit netlists into safe, testable and manufacturable mask layout, taking into account various parasitic effects. Low-power circuit design is another important topic. Economic aspects and management issues of VLSI projects round off the course.
ObjectiveKnow how to design digital VLSI circuits that are safe, testable, durable, and make economic sense.
ContentThe second course begins with a thorough discussion of various technical aspects at the circuit and layout level before moving on to economic issues of VLSI. Topics include:
- The difficulties of finding fabrication defects in large VLSI chips.
- How to make integrated circuit testable (design for test).
- Synchronous clocking disciplines compared, clock skew, clock distribution, input/output timing.
- Synchronization and metastability.
- CMOS transistor-level circuits of gates, flip-flops and random access memories.
- Sinks of energy in CMOS circuits.
- Power estimation and low-power design.
- Current research in low-energy computing.
- Layout parasitics, interconnect delay, static timing analysis.
- Switching currents, ground bounce, IR-drop, power distribution.
- Floorplanning, chip assembly, packaging.
- Layout design at the mask level, physical design verification.
- Electromigration, electrostatic discharge, and latch-up.
- Models of industrial cooperation in microelectronics.
- The caveats of virtual components.
- The cost structures of ASIC development and manufacturing.
- Market requirements, decision criteria, and case studies.
- Yield models.
- Avenues to low-volume fabrication.
- Marketing considerations and case studies.
- Management of VLSI projects.

Exercises are concerned with back-end design (floorplanning, placement, routing, clock and power distribution, layout verification). Industrial CAD tools are being used.
Lecture notesH. Kaeslin: "Top-Down Digital VLSI Design, from Gate-Level Circuits to CMOS Fabrication", Lecture Notes Vol.2 , 2015.

All written documents in English.
LiteratureH. Kaeslin: "Top-Down Digital VLSI Design, from Architectures to Gate-Level Circuits and FPGAs", Elsevier, 2014, ISBN 9780128007303.
Prerequisites / NoticeHighlight:
Students are offered the opportunity to design a circuit of their own which then gets actually fabricated as a microchip! Students who elect to participate in this program register for a term project at the Integrated Systems Laboratory in parallel to attending the VLSI II course.

Prerequisites:
"VLSI I: from Architectures to Very Large Scale Integration Circuits and FPGAs" or equivalent knowledge.

Further details:
https://vlsi2.ethz.ch
252-0028-00LDigital Design and Computer Architecture Information 7 credits4V + 2UO. Mutlu, F. K. Gürkaynak
AbstractThe class provides a first introduction to the design of digital circuits and computer architecture. It covers technical foundations of how a computing platform is designed from the bottom up. It introduces various execution paradigms, hardware description languages, and principles in digital design and computer architecture.
ObjectiveThis class provides a first approach to Computer Architecture. The students learn the design of digital circuits in order to:
- understand the basics,
- understand the principles (of design),
- understand the precedents (in computer architecture).
Based on such understanding, the students are expected to:
- learn how a modern computer works underneath, from the bottom up,
- evaluate tradeoffs of different designs and ideas,
- implement a principled design (a simple microprocessor),
- learn to systematically debug increasingly complex systems,
- hopefully be prepared to develop novel, out-of-the-box designs.
The focus is on basics, principles, precedents, and how to use them to create/implement good designs.
ContentThe class consists of the following major blocks of contents:
- Major Current Issues in Computer Architecture: Principles, Mysteries, Motivational Case Studies and Examples
- Digital Logic Design: Combinational Logic, Sequential Logic, Hardware Description Languages, FPGAs, Timing and Verification.
- Basics of Computer Architecture: Von Neumann Model of Computing, Instruction Set Architecture, Assembly Programming, Microarchitecture, Microprogramming.
- Basics of Processor Design: Pipelining, Out-of-Order Execution, Branch Prediction.
- Execution Paradigms: Out-of-order Execution, Dataflow, Superscalar Execution, VLIW, SIMD Processors, GPUs, Systolic Arrays, Multithreading.
- Memory System: Memory Organization, Memory Technologies, Memory Hierarchy, Caches, Virtual Memory.
Lecture notesAll the materials (including lecture slides) will be provided on the course website:
http://safari.ethz.ch/digitaltechnik/
The video recordings of the lectures are likely to be made available, but there may be delays associated with the posting of online videos.
LiteraturePatt and Patel's "Introduction to Computing Systems" and Harris and Harris's "Digital Design and Computer Architecture" are the official textbooks of the course.
We will provide required and recommended readings in every lecture since the course is cutting-edge and there is no textbook that covers what the course covers. They will be mostly chapters of the two textbooks, and important articles that are essential for understanding the material.