Onur Mutlu: Catalogue data in Autumn Semester 2021

Name	Prof. Dr. Onur Mutlu
Field	Computer Science
Address	Dep. Inf.techno.u.Elektrotechnik ETH Zürich, ETZ F 84 Gloriastrasse 35 8092 Zürich SWITZERLAND
E-mail	onur.mutlu@safari.ethz.ch
URL	https://people.inf.ethz.ch/omutlu/
Department	Information Technology and Electrical Engineering
Relationship	Full Professor

Number	Title	ECTS	Hours	Lecturers
227-0085-34L	Projects & Seminars: Exploring Future Memory Systems with RAMulator Only for Electrical Engineering and Information Technology BSc. The course unit can only be taken once. Repeated enrollment in a later semester is not creditable.	3 credits	3P	O. Mutlu, H. Hassan
Abstract	The category of "Laboratory Courses, Projects, Seminars" includes courses and laboratories in various formats designed to impart practical knowledge and skills. Moreover, these classes encourage independent experimentation and design, allow for explorative learning and teach the methodology of project work.
Learning objective	DRAM is predominantly used to build the main memory systems of modern computing devices. Simulation-based experimental studies are key for understanding the complex interactions between DRAM and modern applications. Ramulator is an extensible DRAM simulator providing cycle-accurate performance models for a variety of commercial DRAM standards (e.g., DDR3/4, LPDDR3/4, GDDR5, HBM) and academic proposals. Ramulator has a modular design that enables easy integration of additional DRAM standards and mechanisms. Ramulator is written in C++11 and can be easily integrated to full-system simulators such as gem5. In this P&S, you will design new DRAM and memory controller mechanisms for improving overall system performance, energy consumption, and reliability. You will extend Ramulator with these new designs and evaluate their performance, energy consumption, and reliability using modern applications. This will be the right P&S for you if you would like to learn about the state-of-the-art memory controller and DRAM designs and their interaction with modern applications. This P&S will also enable you to hands-on simulate and understand the memory system behavior of modern workloads such as machine learning, graph analytics, genome analysis. Prerequisites of the course: - Digital Design and Computer Architecture (or equivalent course) - A good knowledge in C/C++ programming language. - Interest in making things efficient and solving problems. - Interest in understanding software development and hardware design, and their interactions. The course is conducted in English. Course website: https://safari.ethz.ch/projects_and_seminars/doku.php?id=ramulator
227-0085-35L	Projects & Seminars: Enabling Secure, Reliable and Fast Memory with Hands-On FPGA Experiments Only for Electrical Engineering and Information Technology BSc. The course unit can only be taken once. Repeated enrollment in a later semester is not creditable.	3 credits	3P	O. Mutlu, H. Hassan
Abstract	The category of "Laboratory Courses, Projects, Seminars" includes courses and laboratories in various formats designed to impart practical knowledge and skills. Moreover, these classes encourage independent experimentation and design, allow for explorative learning and teach the methodology of project work.
Learning objective	DRAM is predominantly used to build the main memory systems of modern computing devices. To improve the performance, reliability, and security of DRAM, it is critical to perform experimental characterization and analysis of existing cutting-edge DRAM chips. SoftMC is an FPGA-based DRAM testing infrastructure that enables the programmer to perform all low-level DRAM operations (i.e., DDR commands) in a cycle-accurate manner. SoftMC provides a simple and intuitive high-level programming interface (in C++) that completely hides the low-level details of the FPGA from programmers. Programmers implement test routines in C++, and the test routines automatically get translated into the low-level SoftMC memory controller operations in the FPGA. SoftMC developers write low-level hardware description language code to enable new and faster studies. In this P&S, you will have the chance to learn how DRAM is organized and operates in a low-level and gain practical experience in using SoftMC while developing SoftMC programs for new DRAM characterization studies related to performance, reliability and security. You may also improve the SoftMC infrastructure itself to enable new studies. And, who knows, you might discover new security vulnerabilities like RowHammer. This will be the right P&S for you if you are interested in DRAM technology and would like to learn more about it as well as FPGA technology and how it can be used for practical purposes such as understanding and mitigating RowHammer attacks, generating true random numbers, reducing memory latency, fingerprinting and identifying devices, and improving reliability. Prerequisites of the course: - Digital Design and Computer Architecture (or equivalent course) - Familiarity with FPGA programming - Interest in low-level hacking and memory - Interest in discovering why things do or do not work and solving problems The course is conducted in English. Course website: https://safari.ethz.ch/projects_and_seminars/doku.php?id=softmc
227-0085-51L	Projects & Seminars: Hands-on Acceleration on Heterogeneous Computing Systems Only for Electrical Engineering and Information Technology BSc. Course can only be registered for once. A repeatedly registration in a later semester is not chargeable.	3 credits	3P	O. Mutlu, J. Gómez Luna
Abstract	The category of "Laboratory Courses, Projects, Seminars" includes courses and laboratories in various formats designed to impart practical knowledge and skills. Moreover, these classes encourage independent experimentation and design, allow for explorative learning and teach the methodology of project work.
Learning objective	The increasing difficulty of scaling the performance and efficiency of CPUs every year has created the need for turning computers into heterogeneous systems, i.e., systems composed of multiple types of processors that can suit better different types of workloads or parts of them. More than a decade ago, Graphics Processing Units (GPUs) became general-purpose parallel processors, in order to make their outstanding processing capabilities available to many workloads beyond graphics. GPUs have been critical key to the recent rise of Machine Learning and Artificial Intelligence, which took unrealistic training times before the use of GPUs. Field-Programmable Gate Arrays (FPGAs) are another example computing device that can deliver impressive benefits in terms of performance and energy efficiency. More specific examples are (1) a plethora of specialized accelerators (e.g., Tensor Processing Units for neural networks), and (2) near-data processing architectures (i.e., placing compute capabilities near or inside memory/storage). Despite the great advances in the adoption of heterogeneous systems in recent years, there are still many challenges to tackle, for example: - Heterogeneous implementations (using GPUs, FPGAs, TPUs) of modern applications from important fields such as bioinformatics, machine learning, graph processing, medical imaging, personalized medicine, robotics, virtual reality, etc. - Scheduling techniques for heterogeneous systems with different general-purpose processors and accelerators, e.g., kernel offloading, memory scheduling, etc. - Workload characterization and programming tools that enable easier and more efficient use of heterogeneous systems. If you are enthusiastic about working hands-on with different software, hardware, and architecture projects for heterogeneous systems, this is your P&S. You will have the opportunity to program heterogeneous systems with different types of devices (CPUs, GPUs, FPGAs, TPUs), propose algorithmic changes to important applications to better leverage the compute power of heterogeneous systems, understand different workloads and identify the most suitable device for their execution, design optimized scheduling techniques, etc. In general, the goal will be to reach the highest performance reported for a given important application. Prerequisites of the course: - Digital Design and Computer Architecture (or equivalent course). - Familiarity with C/C++ programming and strong coding skills. - Interest in future computer architectures and computing paradigms. - Interest in discovering why things do or do not work and solving problems - Interest in making systems efficient and usable The course is conducted in English.
227-2210-00L	Computer Architecture	8 credits	6G + 1A	O. Mutlu
Abstract	Computer architecture is the science & art of designing and optimizing hardware components and the hardware/software interface to create a computer that meets design goals. This course covers basic components of a modern computing system (memory, processors, interconnects, accelerators). The course takes a hardware/software cooperative approach to understanding and designing computing systems.
Learning objective	We will learn the fundamental concepts of the different parts of modern computing systems, as well as the latest major research topics in Industry and Academia. We will extensively cover memory systems (including DRAM and new Non-Volatile Memory technologies, memory controllers, flash memory), parallel computing systems (including multicore processors, coherence and consistency, GPUs), heterogeneous computing, processing-in-memory, interconnection networks, specialized systems for major data-intensive workloads (e.g. graph analytics, bioinformatics, machine learning), etc.
Content	The principles presented in the lecture are reinforced in the laboratory through 1) the design and implementation of a cycle-accurate simulator, where we will explore different components of a modern computing system (e.g., pipeline, memory hierarchy, branch prediction, prefetching, caches, multithreading), and 2) the extension of state-of-the-art research simulators (e.g., Ramulator) for more in-depth understanding of specific system components (e.g., memory scheduling, prefetching).
Lecture notes	All the materials (including lecture slides) will be provided on the course website: https://safari.ethz.ch/architecture/ The video recordings of the lectures are expected to be made available after lectures.
Literature	We will provide required and recommended readings in every lecture. They will mainly consist of research papers presented in major Computer Architecture and related conferences and journals.
Prerequisites / Notice	Digital Design and Computer Architecture.
227-2211-00L	Seminar in Computer Architecture Number of participants limited to 28. The deadline for deregistering expires at the end of the second week of the semester. Students who are still registered after that date, but do not attend the seminar, will officially fail the seminar.	2 credits	2S	O. Mutlu, M. H. K. Alser, J. Gómez Luna
Abstract	In this seminar course, we will cover fundamental and cutting-edge research papers in computer architecture. The course will consist of multiple components that are aimed at improving students' technical skills in computer architecture, critical thinking and analysis on computer architecture concepts, as well as technical presentation of concepts and papers in both spoken and written forms.
Learning objective	The main objective is to learn how to rigorously analyze and present papers and ideas on computer architecture. We will have rigorous presentation and discussion of selected papers during lectures and a written report delivered by each student at the end of the semester. This course is for those interested in computer architecture. Registered students are expected to attend every lecture, participate in the discussion, and create a synthesis report at the end of the course.
Content	Topics will center around computer architecture. We will, for example, discuss papers on hardware security; architectural acceleration mechanisms for key applications like machine learning, graph processing and bioinformatics; memory systems; interconnects; processing inside memory; various fundamental and emerging paradigms in computer architecture; hardware/software co-design and cooperation; fault tolerance; energy efficiency; heterogeneous and parallel systems; new execution models, etc.
Lecture notes	All the materials will be posted on the course website: https://safari.ethz.ch/architecture_seminar/ Links to past course materials, including the synthesis report assignment, can be found in this page: https://safari.ethz.ch/architecture_seminar/doku.php?id=sidebar
Literature	Key papers and articles, on both fundamentals and cutting-edge topics in computer architecture will be provided and discussed. These will be posted on the course website.
Prerequisites / Notice	Design of Digital Circuits. Students should have done very well in Design of Digital Circuits and show a genuine interest in Computer Architecture.