227-0085-34L P&S: Exploration of Emerging Memory Systems
| Semester | Autumn Semester 2023 |
| Lecturers | O. Mutlu |
| Periodicity | every semester recurring course |
| Course | Does not take place this semester. |
| Language of instruction | English |
| Comment | The course unit can only be taken once. Repeated enrollment in a later semester is not creditable. |
| Abstract | The category of "Laboratory Courses, Projects, Seminars" includes courses and laboratories in various formats designed to impart practical knowledge and skills. Moreover, these classes encourage independent experimentation and design, allow for explorative learning and teach the methodology of project work. | |||||||||||||||||||||||||||||||||
| Learning objective | DRAM is predominantly used to build the main memory systems of modern computing devices. Emerging memory technologies (RRAM, PCM, STT-MRAM, FeRAM) provide an exciting opportunity to replace or complement DRAM. Simulation-based experimental studies are key for understanding the complex interactions between DRAM, emerging memory technologies, and modern applications. Ramulator is an extensible main memory simulator providing cycle-accurate performance models for a variety of commercial DRAM standards (e.g., DDR3/4, LPDDR3/4, GDDR5, HBM), emerging memory technologies, and academic proposals. Ramulator has a modular design that enables easy integration of additional standards, technologies and mechanisms. Ramulator is written in C++11 and can be easily integrated to full-system simulators such as gem5. In this P&S, you will design new memory and memory controller mechanisms for improving overall system performance, energy consumption, reliability, security, scalability and cost. You will extend Ramulator with these new designs and evaluate their performance, energy consumption, and reliability using modern applications. This will be the right P&S for you if you would like to learn about the state-of-the-art and future memory and memory controllerdesigns and their interaction with modern applications. This P&S will also enable you to hands-on simulate and understand the memory system behavior of modern workloads such as machine learning, graph analytics, genome analysis. The course is conducted in English. Course website: https://safari.ethz.ch/projects_and_seminars/doku.php?id=ramulator | |||||||||||||||||||||||||||||||||
| Lecture notes | See https://safari.ethz.ch/projects_and_seminars/doku.php?id=ramulator | |||||||||||||||||||||||||||||||||
| Literature | Learning Materials =============== An old version of Ramulator: https://github.com/CMU-SAFARI/ramulator Original Ramulator paper: https://people.inf.ethz.ch/omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf An example study of modern workloads and DRAM architectures using Ramulator: Link An example recent study of a new DRAM architecture using Ramulator: Link An example recent study of a new virtual memory system architecture using Ramulator: https://people.inf.ethz.ch/omutlu/pub/VBI-virtual-block-interface_isca20.pdf Several examples of new ideas enabled by Ramulator based evaluation https://people.inf.ethz.ch/omutlu/pub/rowclone_micro13.pdf https://people.inf.ethz.ch/omutlu/pub/salp-dram_isca12.pdf https://people.inf.ethz.ch/omutlu/pub/raidr-dram-refresh_isca12.pdf https://people.inf.ethz.ch/omutlu/pub/DR_STRANGE_EndtoEnd-DRAM-TRNG_hpca22.pdf | |||||||||||||||||||||||||||||||||
| Prerequisites / Notice | Prerequisites of the course: Digital Circuits AND Computer Engineering A good knowledge in C/C++ programming language. Interest in making things efficient and solving problems. Interest in understanding software development and hardware design, and their interactions. | |||||||||||||||||||||||||||||||||
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